PICASM Assembler Opcodes

The PICASM Opcodes are designed to make writing Assembly Language programs for the PIC as easy as for any other processor.		This is a replication of the Opcode List which is included with the PICASM Distribution Archive. It is provided here as an online reference, and as a guide to the functionality of the opcodes used in the PICASM Assembler for the Microchip PIC. PICASM Opcodes ADD AND BBC BBS BCC BCS BEQ BGE BLT BNE BRA BRA FAR BSR BSR FAR BZC BZS CLC CLI CLR CLRBIT CMP DEC DECBEQ DECBNE DECBZC DECJNZ DECSEQ DECSNE DECSZC DECSZS INC INCBEQ INCBNE INCBZC INCJNZ INCSEQ INCSNE INCSZC INCSZS JBC JBS LET MOV NOT OR ROL ROR RTI RTS SBC SBS SCC SCS SEC SEI SEQ SETBIT SGE SHL SHR SLT SNE SUB SWP SZC SZS TST XOR The PICASM Assembly Language extends the number of PIC opcodes available to 48 with an additional 20 opcodes which are aliases of those 48. There are therefore 68 PICASM opcodes in total. Note that not all opcodes may be supported on all PIC processors, especially those which relate to interrupts. Definitions reg   A Special Function Register name, or an expression which evaluates to the address of a Special Function Register. num A literal number or expression which evaluates to a constant value. bit A literal number or expression which evaluates to a constant value in the range of 0 to 7. regbit ... more ... adr A label name or a literal number or expression which evaluates to an address of an instruction within the code space. ADD - Arithmatic Add ADD reg,W  = ADDWF reg ADD W,#num  = ADDLW num ADD W,reg  = ADDWF reg,W AND - Logical And AND reg,W  = ANDWF reg AND W,#num  = ANDLW num AND W,reg  = ANDWF reg,W BBC - Branch if Bit Clear BBC reg,bit,adr  = BTFSS reg,bit GOTO adr BBC regbit,adr  = BTFSS reg,bit GOTO adr BBS - Branch if Bit Set BBS reg,bit,adr  = BTFSC reg,bit GOTO adr BBS regbit,adr  = BTFSC reg,bit GOTO adr BCC - Branch if Carry bit Clear BCC adr  = BTFSS STATUS,CARRY GOTO adr BCS - Branch if Carry bit Set BCS adr  = BTFSC STATUS,CARRY GOTO adr BEQ - Branch if Equal This opcode is an alias for BZS ( Branch if Zero bit Set ). BEQ adr  = BTFSC STATUS,ZERO GOTO adr BGE - Branch if Greater than or Equal This opcode is an alias for BCS ( Branch if Carry bit Set ). BGE adr  = BTFSC STATUS,CARRY GOTO adr BLT - Branch if Less than This opcode is an alias for BCC ( Branch if Carry bit Clear ). BLT adr  = BTFSS STATUS,CARRY GOTO adr BNE - Branch if Not Equal This opcode is an alias for BZC ( Branch if Zero bit Clear ). BNE adr  = BTFSS STATUS,ZERO GOTO adr BRA - Branch BRA adr  = GOTO adr BRA  [W]  = MOVWF PCL BRA FAR - Branch Far BRA FAR adr  = ? GOTO adr BSR - Branch to Subroutine BSR adr  = CALL adr BSR adr(#num)  = MOVLW num CALL adr BSR adr(reg)  = MOVF reg,W CALL adr BSR adr(W)  = CALL adr BSR FAR - Branch to Far Subroutine BSR FAR adr  = ? CALL adr BZC - Branch if Zero bit Clear BZC adr  = BTFSS STATUS,ZERO GOTO adr BZS - Branch if Zero bit Set BZS adr  = BTFSC STATUS,ZERO GOTO adr CLC - Clear Carry bit CLC  = BCF STATUS,CARRY CLI - Clear Interrupt bit CLI  = BCF INTCON,GIE CLR - Clear CLR reg  = CLRF reg CLR W  = CLRW CLR WDT  = CLRWDT CLRBIT - Clear Bit CLRBIT reg,bit  = BCF reg,bit CLRBIT regbit  = BCF reg,bit CMP - Compare Note that all the CMP instructions will corrupt the contents of the W register CMP reg,#num  = MOVLW num SUBWF reg,W CMP regd,regs  = MOVF regs,W SUBWF regd,W CMP reg,W  = SUBWF reg,W CMP W,reg  = SUBWF reg,W CMP W,W  = CLRW DEC - Decrement DEC reg  = DECF reg DEC W  = SUBLW 1 DEC W,reg  = DECF reg,W DECBEQ - Decrement and Branch if Equal to zero This opcode is an alias for DECBZS ( Decrement and Branch if Zero bit Set ). DECBNE - Decrement and Branch if Not Equal to zero This opcode is an alias for DECBZC ( Decrement and Branch if Zero bit Clear ). DECBNE reg,adr  = DECFSZ reg GOTO adr DECBNE W,adr  = SUBLW 1 BTFSS STATUS,ZERO GOTO adr DECBNE W,reg,adr  = DECFSZ reg,W GOTO adr DECBZC - Decrement and Branch if Zero bit Clear DECBZC reg,adr  = DECFSZ reg GOTO adr DECBZC W,adr  = SUBLW 1 BTFSS STATUS,ZERO GOTO adr DECBZC W,reg,adr  = DECFSZ reg,W GOTO adr DECJNZ - Decrement and Jump in Not Equal to zero This opcode is an alias for DECBZC ( Decrement and Branch if Zero bit Clear ). DECJNZ reg,adr  = DECFSZ reg GOTO adr DECJNZ W,adr  = SUBLW 1 BTFSS STATUS,ZERO GOTO adr DECJNZ W,reg,adr  = DECFSZ reg,W GOTO adr DECSEQ - Decrement and Skip if Equal to zero This opcode is an alias for DECSZS ( Decrement and Skip if Zero bit set ). DECSEQ reg  = DECFSZ reg DECSEQ W  = SUBLW 1 BTFSS STATUS,ZERO DECSEQ W,reg  = DECFSZ reg,W DECSNE - Decrement and Skip if Not Equal to zero This opcode is an alias for DECSZC ( Decrement and Skip if Zero bit Clear ). DECSNE reg  = ? DECSNE W  = ? DECSNE W,reg  = ? DECSZC - Decrement and Skip if Zero bit Clear DECSZC reg  = ? DECSZC W  = ? DECSZC W,reg  = ? DECSZS - Decrement and Skip if Zero bit set DECSZS reg  = DECFSZ reg DECSZS W  = SUBLW 1 BTFSS STATUS,ZERO DECSZS W,reg  = DECFSZ reg,W INC - Increment INC reg  = INCF reg INC W  = ADDLW 1 INC W,reg  = INCF reg,W INCBEQ - Increment and Branch if Equal to zero This opcode is an alias for INCBZS ( Increment and Branch if Zero bit Set ). INCBNE - Increment and Branch if Not Equal to zero This opcode is an alias for INCBZC ( Increment and Branch if Zero bit Clear ). INCBNE reg,adr  = INCFSZ reg GOTO adr INCBNE W,adr  = ADDLW 1 BTFSS STATUS,ZERO GOTO adr INCBNE W,reg,adr  = INCFSZ reg,W GOTO adr INCBZC - Increment and Branch if Zero bit Clear INCBZC reg,adr  = INCFSZ reg GOTO adr INCBZC W,adr  = ADDLW 1 BTFSS STATUS,ZERO GOTO adr INCBZC W,reg,adr  = INCFSZ reg,W GOTO adr INCJNZ - Increment and Jump in Not Equal to zero This opcode is an alias for INCBZC ( Increment and Branch if Zero bit Clear ). INCJNZ reg,adr  = INCFSZ reg GOTO adr INCJNZ W,adr  = ADDLW 1 BTFSS STATUS,ZERO GOTO adr INCJNZ W,reg,adr  = INCFSZ reg,W GOTO adr INCSEQ - Increment and Skip if Equal to zero This opcode is an alias for INCSZS ( Increment and Skip if Zero bit set ). INCSEQ reg  = INCFSZ reg INCSEQ W  = ADDLW 1 BTFSS STATUS,ZERO INCSEQ W,reg  = INCFSZ reg,W INCSNE - Increment and Skip if Not Equal to zero This opcode is an alias for INCSZC ( Increment and Skip if Zero bit Clear ). INCSNE reg  = ? INCSNE W  = ? INCSNE W,reg  = ? INCSZC - Increment and Skip if Zero bit Clear INCSZC reg  = ? INCSZC W  = ? INCSZC W,reg  = ? INCSZS - Increment and Skip if Zero bit set INCSZS reg  = INCFSZ reg INCSZS W  = ADDLW 1 BTFSS STATUS,ZERO INCSZS W,reg  = INCFSZ reg,W JBC - Jump if Bit Clear This opcode is an alias for BBC ( Branch if Bit Clear ). JBC reg,bit,adr  = BTFSS reg,bit GOTO adr JBC regbit,adr  = BTFSS reg,bit GOTO adr JBS - Jump if Bit Set This opcode is an alias for BBS ( Branch if Bit Set ). JBS reg,bit,adr  = BTFSC reg,bit GOTO adr JBS regbit,adr  = BTFSC reg,bit GOTO adr LET - Assignment LET reg,#num  = MOVLW num MOVWF reg Note that the above instructions will corrupt the contents of the W register LET regd,regs  = MOVF regs,W MOVWF regd Note that the above instructions will corrupt the contents of the W register LET reg,W  = MOVWF reg LET W,#num  = MOVLW num LET W,reg  = MOVF reg,W LET W,W  = No code generated LET WDT,#num  = CLRWDT MOV - Move MOV reg,#num  = Not possible - Use LET opcode MOV regd,regs  = Not possible - Use LET opcode MOV reg,W  = MOVWF reg MOV W,#num  = MOVLW num MOV W,reg  = MOVF reg,W MOV W,W  = No code generated MOV WDT,#num  = CLRWDT NOT - Logical Complement NOT reg  = COMF reg NOT W  = XORLW 255 NOT W,reg  = COMF reg,W OR - Logical Or OR reg,W  = IORWF reg OR W,#num  = IORLW num OR W,reg  = IORWF reg,W ROL - Rotate Left ROL reg  = RLF reg ROL W,reg  = RLF reg,W ROR - Rotate Right ROR reg  = RRF reg ROR W,reg  = RRF reg,W RTI - Return from Interrupt RTI  = RETFIE RTS - Return from Subroutine RTS  = RETURN RTS W  = RETURN RTS W,#num  = RETLW num RTS W,reg  = MOVF reg,W RETURN SBC - Skip if Bit Clear SBC reg,bit  = BTFSC reg,bit SBC regbit  = BTFSC reg,bit SBS - Skip if Bit Set SBS reg,bit  = BTFSS reg,bit SBS regbit  = BTFSS reg,bit SCC - Skip if Carry bit Clear SCC  = BTFSC STATUS,CARRY SCS - Skip if Carry bit Set SCS  = BTFSS STATUS,CARRY SEC - Set Carry bit SEC  = BSF STATUS,CARRY SEI - Set Interrupt bit SEI  = BSF INTCON,GIE SEQ - Skip if Equal This opcode is an alias for SZS ( Skip if Zero bit Set ). SEQ  = BTFSS STATUS,ZERO SETBIT - Set Bit SETBIT reg,bit  = BSF reg,bit SETBIT regbit  = BSF reg,bit SGE - Skip if Greater than or Equal This opcode is an alias for SCS ( Skip if Carry bit Set ). SGE  = BTFSS STATUS,CARRY SHL - Shift Left SHL reg  = BCF STATUS,CARRY RLF reg SHL W,reg  = BCF STATUS,CARRY RLF reg,W SHR - Shift Right SHR reg  = BCF STATUS,CARRY RRF reg SHR W,reg  = BCF STATUS,CARRY RRF reg,W SLT - Skip if Less Than This opcode is an alias for SCC ( Skip if Carry bit Clear ). SLT  = BTFSC STATUS,CARRY SNE - Skip if Not Equal This opcode is an alias for SZC ( Skip if Zero bit Clear ). SNE  = BTFSC STATUS,ZERO SUB - Arithmatic Subtraction SUB reg,#num  = MOVLW num SUBWF reg Note that the above instructions will corrupt the contents of the W register SUB regd,regs  = MOVF regs,W SUBWF regd Note that the above instructions will corrupt the contents of the W register SUB reg,W  = SUBWF reg SUB W,#num  = ADDLW  -num SUB W,#num,W  = SUBLW num SUB W,reg,#num  = MOVLW num SUBWF reg,W SUB W,regd,regs  = MOVF regs,W SUBWF regd,W SUB W,reg,W  = SUBWF reg,W SWP - Swap nibbles SWP reg  = SWAPF reg SWP W,reg  = SWAPF reg,W SZC - Skip if Zero bit Clear SZC  = BTFSC STATUS,ZERO SZS - Skip if Zero bit Set SZS  = BTFSS STATUS,ZERO TST - Arithmatic Test TST reg  = MOVF reg TST W  = IORLW 0 XOR - Logical Exclusive Or XOR reg,W  = XORWF reg XOR W,#num  = XORLW num XOR W,reg  = XORWF reg,W
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First published on Wednesday the 20th of November, 2002 at 15:59:54 Last upload was on Thursday the 8th of January, 2004 at 14:07:32